The Attoswitch project will participate in SISPAD 2025 Conference!
We’re pleased to announce that our abstract has been accepted for presentation at SISPAD 2025. The work, titled “Layer and Stacking Effects on Transport Properties in Steep-Slope Cold-Metal-Source FETs”, is authored by Chiao-Yu Chang, Bart Soree, and Aryan Afzalian.
This study addresses a critical challenge in low-power electronics: enhancing transport properties in cold-metal-source field-effect transistors (FETs) using layered 2D materials and heterostructure engineering. Leveraging our DFT-NEGF-based simulator ATOMOS, which includes electron-phonon coupling analysis, the team demonstrates that optimized NbS₂/WS₂ stacking reduces the van der Waals gap, significantly improving the on-current. Moreover, adding cold-metal layers increases the density of states near the Fermi level, further boosting device performance.
The results provide a powerful design strategy for cold-source materials and contacts to enable steep-slope transport, paving the way for ultra-low-power transistors.
Stay tuned for more updates from the conference!
